| 摘要 |
PROBLEM TO BE SOLVED: To avoid the occurrence of a data error caused by dependency and to execute a plurality of instructions in parallel and in out-of-order. SOLUTION: The system includes an instruction fetch unit and an execution unit for executing instructions in out-of-order. The execution unit includes: a register file 250; a plurality of function units 260 and 262; a first bus 254 for transferring data from the register file to the plurality of function units; second buses 275 and 276 for transferring data from the plurality of function units to the register file; and a load and store unit 205 adapted to make load requests to a memory system in out-of-order for all instructions in an instruction window and to make store requests in order for all the instructions in the instruction window. COPYRIGHT: (C)2006,JPO&NCIPI
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