发明名称 Semiconductor integrated circuit and power-saving control method thereof
摘要 A semiconductor integrated circuit has an SDRAM and a group of elements, whose power consumption is controlled (referred to as "power-controlled block"). The power-controlled block includes a CPU and a memory control circuit. A power control circuit outputs a power-down signal to an output-fixing circuit when a power-saving mode setting command is supplied from the CPU. A control signal for commanding self-refresh operation is generated from the output-fixing circuit to the SDRAM. The power control circuit thereafter stops the supply of power to the entire power-controlled block in response to a power control signal. When a restart signal is provided, the power control circuit starts the supply of power to the power-controlled block. A power-saving mode release command is then generated from the CPU to the power control circuit, and the power-down signal is stopped. Thereupon, the output-fixing circuit provides a control signal generated from the memory control circuit directly to the SDRAM.
申请公布号 US2005283572(A1) 申请公布日期 2005.12.22
申请号 US20050118343 申请日期 2005.05.02
申请人 ISHIHARA YUZO 发明人 ISHIHARA YUZO
分类号 G06F1/32;G06F12/00;G06F12/14;(IPC1-7):G06F12/00 主分类号 G06F1/32
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