发明名称 Halbleiteranordnung mit einem Schaltungssubstrat und einem Gehäuse
摘要 <p>Main current terminals (31, 32) electrically coupled to main electrodes of IGBT elements (27) which are loaded on a power substrate (30) project from a side wall of a case (21) to the exterior. The main current terminals (31, 32), which are in the form of flat plates having the same plane contours in principal parts thereof, are arranged to be parallel to each other and overlap with each other. Thus, inductances of the main current terminals (31, 32) are suppressed. An insulating member (33) is interposed between the portions of the main current terminals (31, 32) outwardly projecting from the case (21), while outwardly extending from the plane contours of the main current terminals (31, 32). Therefore, a withstand voltage across these portions of the main current terminals (31, 32) is maintained at a high value. The interior of the case (21) is filled up with an electric insulating filler (43), whereby a withstand voltage across the remaining portions of the main current terminals (31, 32) which are stored in the case (21) is also maintained at a high value. Thus, a high withstand voltage across the main current terminals and reduction of the inductances are compatibly implemented. <IMAGE></p>
申请公布号 DE69635440(D1) 申请公布日期 2005.12.22
申请号 DE1996635440 申请日期 1996.05.09
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO 发明人 MATSUKI, MASATOSHI
分类号 H01L21/50;H01L25/07;H01L25/18;(IPC1-7):H01L25/07;H01L25/16;H01L23/498 主分类号 H01L21/50
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