发明名称 Interpolator testing system
摘要 According to some embodiments, a device includes an interpolator to receive at least a first clock signal having a first clock phase and to receive a second clock signal having a second clock phase. The interpolator may include a first plurality of interpolator legs associated with the first clock signal, a second plurality of interpolator legs associated with the second clock signal, and an output node to provide an output clock signal having an output clock phase based on the first clock signal, the second clock signal, and on a number of the first plurality and the second plurality of interpolator legs that are activated. The device may also include an interpolator control to activate only one of the first plurality and the second plurality of interpolator legs.
申请公布号 US2005280452(A1) 申请公布日期 2005.12.22
申请号 US20040869573 申请日期 2004.06.16
申请人 VAKIL KERSI H;PANIKKAR ADARSH;KOLLA ABHIMANYU;FORESTIER ARNAUD 发明人 VAKIL KERSI H.;PANIKKAR ADARSH;KOLLA ABHIMANYU;FORESTIER ARNAUD
分类号 G01R31/317;G11C29/02;H03K5/00;H03K5/13;H03L7/00;(IPC1-7):H03L7/00 主分类号 G01R31/317
代理机构 代理人
主权项
地址