摘要 |
According to the invention, a circuit arrangement for gaining a 38 kHz stereo subcarrier and a 57 kHz RDS carrier for decoding a stereo signal comprised in a demodulated FM signal and/or an RDS signal comprised in a demodulated FM signal, having a simple structure with only one PLL and particularly only one voltage-controlled oscillator ( 2 ) is characterized in that the arrangement comprises a phase-locked loop with a loop filter ( 1 ), a voltage-controlled oscillator ( 2 ), a first phase detector ( 3 ) which receives a reference signal having a reference frequency, and a second phase detector ( 4 ), which receives the FM signal, the output signal of the voltage-controlled oscillator ( 2 ) being coupled to both phase detectors ( 3, 4 ) in a form divided down by means of dividers ( 6, 9; 10, 11 ), and the signal fed back to the second phase detector having a frequency of 19 kHz, in that dividers ( 9, 10, 12 ) are provided, by means of which the output signal of the voltage-controlled oscillator ( 2 ) is divided down and which supply the 38 kHz stereo subcarrier and the 57 kHz RDS carrier, in that a frequency control circuit ( 8 ), which is active only upon start-up of the circuit arrangement, compares the two signals applied to the first phase detector ( 3 ) and controls the voltage-controlled oscillator ( 2 ) in a predetermined frequency range around the reference frequency of the reference signal, in that, after reaching the predetermined frequency range, the frequency control circuit ( 8 ) is deactivated and the output signal of the first phase detector ( 3 ) is coupled to the loop filter ( 1 ), and in that subsequently, if the demodulated FM signal should comprise a 19 kHz pilot, the output signal of the second phase detector ( 4 ) is coupled to the loop filter ( 1 ).
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