Time-multiplexed routing in a programmable logic device architecture

摘要

Programmable logic device interconnection resources include bus wires. A bus wire provides a programmable signal path across the programmable logic device from several logic device outputs to several other logic device inputs. Serializing circuitry multiplexes multiple device output signals and drives time-multiplexed data signals on the bus wires. Bus registers placed at the ends of bus wires register or buffer the data signals transmitted over the bus wires. The registered signals are passed on to deserializing circuitry for demultiplexing data signals to provide parallel device input signals. The bus registers, and the serializing/deserializing circuitry are clocked at a rate faster than the device system clock to schedule the use of the bus wires for transmission of multiple device input/output signals over the bus wires within a system clock cycle.