发明名称 AUTOMATIC DESIGN METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an automatic design method that can shorten a processing time, prevent a decrease in yield and reliability, and manufacture a semiconductor device having high wiring effectiveness, as well as a semiconductor integrated circuit that can be produced by using this method. SOLUTION: The automatic design method includes a step in which an automatic arrangement module 10 automatically arranges a first wiring pattern 110a, a second pattern 130a that is drawn obliquely against the first wiring pattern 110a's longitudinal direction on an upper layer of the first wiring pattern 110a, and a first via pattern 120a at a crossing point of the first wiring pattern 110a and the second wiring pattern 130a, a step in which a double cut via preparation module 20 prepares a double cut via 150a and stores it into a double cut via data file 63, and a step in which a double cut via substitution module 30 substitutes a most suitable double cut via 150a based on the graphic environment around the first via pattern 110a. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005347692(A) 申请公布日期 2005.12.15
申请号 JP20040168594 申请日期 2004.06.07
申请人 TOSHIBA CORP 发明人 OKUMURA ATSUYUKI
分类号 G06F17/50;H01L21/3205;H01L21/82;H01L23/48;H01L23/52;H01L23/522;H01L23/528;H01L29/40;(IPC1-7):H01L21/82;H01L21/320 主分类号 G06F17/50
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