发明名称 Method and system for modeling variation of circuit parameters in delay calculation for timing analysis
摘要 A system, method, and computer program accurately models circuit parameter variation for delay calculation. For any given circuit parameter value, a cell is characterized at just three values in the circuit parameter range. An interpolation process generates an equation to calculate delay using the characterization data from the three circuit parameter values. This delay equation calculates the delay for any value in the circuit parameter range. Similar methodology is used to model simultaneous variation of two circuit parameters. The cell is characterized at just six circuit parameter pairs to interpolate the delay equation for any circuit parameter pair in the characterized ranges. This methodology can be extended to accommodate variation of multiple circuit parameters using similar interpolation techniques.
申请公布号 US2005278671(A1) 申请公布日期 2005.12.15
申请号 US20040014096 申请日期 2004.12.15
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 VERGHESE NISHATH K.;ZHAO HONG
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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