Verfahren zur Modulation eines Grundtaktes für digitale Schaltungen und Taktmodulator zur Ausführung des Verfahrens

摘要

The method varying the interval between adjacent switching edges by passing the base clock via a changing number of delay units (D1-D7). The delay times of the delay units are calibrated and each delay units has several delay elements that are switched in or switched out individually and/or in groups. An Independent claim is also included for a clock modulator.