| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor storage apparatus and signal processing system in which error correction capability can be enhanced, a write-in time or/and a read-out time can be shortened, or a redundancy memory can be dispensed with or can be reduced, can be miniaturized, and a manufacturing cost can be reduced. <P>SOLUTION: This apparatus has a data input part 204 in which data of one page is received, which, is divided into four code words, parity data of four bytes is generated and added to them for each code word, four main code words MCW of 132 bytes are generated successively and they are transferred to a bank (A) 201 or a bank (B) 202, and a data output part 205 in which the data of one page is received including four main code word MCW transferred from a data latch circuit 225, error data is corrected for each main code word (132 bytes) when error data within the prescribed numbers exist, error information is added for each read code word MCW excluding parity data PD and they are transferred to a CPU 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
