BACK ANNOTATION EQUIPMENT, MASK LAYOUT CORRECTING EQUIPMENT, BACK ANNOTATION METHOD, PROGRAM, RECORDING MEDIUM, PROCESS FOR FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

Back annotation equipment for specifying the delay value of a logic cell employed in timing simulation while considering variation in characteristics of a transistor element arranged at a position overlapping the electrode pad of a semiconductor integrated circuit. The back annotation equipment comprises a storage means for storing mask layout information including positional information on the electrode pad and the logical cell of the semiconductor integrated circuit, a decision means for making a decision whether the logical cell is arranged at a position overlapping the electrode pad or not according to the mask layout information, and a selection means for selecting the delay value of the logic cell depending on the decision results obtained by the decision means.