| 摘要 |
The present invention is two-iteration Fourier transform processor for performing Fourier transform of N data inputs into N data outputs. The processor comprises a plurality of two-iteration radix-r modules and a combination phase element. Each radix-r module comprises r radix-r butterflies, a feedback network and a plurality of switches. Each radix-r butterfly comprises r inputs and outputs and a butterfly processing element. The butterfly processing element includes a plurality of multipliers for multiplying the input data and corresponding coefficients and an adder for summing the multiplication outputs from the multipliers. The feedback network feeds outputs of the radix-r butterflies to the corresponding inputs of the radix-r butterfly and the switches selectively pass the input data or the feedback, alternately, to the corresponding radix-r butterfly. The combination phase element includes at least one stage of butterfly computing elements for combining the outputs from the r radix-r butterfly.
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