发明名称 Security barrier for electronic circuitry
摘要 An enclosure for protecting at least a portion of a printed circuit board that includes a top and bottom cover each having an insulating layer between an outer conductive layer and an inner conductive layer. Each outer conductive layer and each inner conductive layer are electrically connected to a voltage source to form tamper detection circuits. The enclosure further includes cover switches to detect attempts to lift or remove the covers and a thermal sensor/switch or the like for indicating that a temperature inside the enclosure has moved past a predetermined level due to a tamper attempt. A detection circuit generates and transmits a signal to cause sensitive information contained in one or more electronic components provided on the circuit board to be erased when a tamper attempt is detected.
申请公布号 US2005275538(A1) 申请公布日期 2005.12.15
申请号 US20040855689 申请日期 2004.05.27
申请人 PITNEY BOWES INCORPORATED 发明人 KULPA WALTER J.
分类号 G06F21/00;G08B13/12;(IPC1-7):G08B13/12 主分类号 G06F21/00
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