| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a data processor for efficiently notifying a processor of the completion of data transfer. <P>SOLUTION: This memory side data transfer processor 13 is provided with K(K≥2) pieces of memory control parts 132 for controlling K pieces of memories. The last K pieces of packets among N pieces of packets corresponding to N(N≥2K) pieces of data blocks configuring data being the target of data transfer processing are added with end flags and transfer processing identifiers, respectively. The N pieces of packets are successively assigned to the K pieces of memory control parts 132 in the order of transmission. When data included in the packet with an end flag are written, each memory control part 132 issues completion notification. When the completion notification is issued from all the memory control parts, the processor 11 is notified of the completion of the data transfer processing. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
