发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, INSPECTION METHOD THEREFOR, AND MANUFACTURING METHOD THEREOF |
摘要 |
<P>PROBLEM TO BE SOLVED: To efficiently analyze the defects of a semiconductor integrated circuit device and inspect its operational characteristics by making use of a signal relating to a chip ID or a redundancy address. <P>SOLUTION: The semiconductor integrated circuit device is provided with; a mode register 11 which can set a chip ID mode and a redundancy address detection mode; a chip ID storage circuit 12 which can electrically be decrypted; a chip ID output circuit 13 which generates a chip ID output signal Soid; and a redundancy detection signal output circuit 6 which generates an external redundancy detection signal Sorda. An inspection program for a product is automatically selected according to the chip ID output signal Soid. An address pattern is automatically controlled according to the external redundancy detection signal Sorda, and operational characteristics in a transition area between a normal memory cell selection state and a redundancy address selection state are intensively inspected, and consequently product management can efficiently and surely be carried out. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
申请公布号 |
JP2005346902(A) |
申请公布日期 |
2005.12.15 |
申请号 |
JP20050155971 |
申请日期 |
2005.05.27 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MOTOMOCHI KENJI |
分类号 |
G01R31/28;G11C29/00;G11C29/10;G11C29/12;H01L21/82 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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