发明名称 SURGE PROTECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a surge protection circuit capable of improving reliability, and a semiconductor integrated circuit equipped therewith by suppressing the deterioration of connection while avoiding the increase of a chip area and the increase of number of manufacturing process. SOLUTION: A p-type well layer 14 is formed partially on the upper surface of an n<SP>-</SP>-type embedded layer 11 in an n<SP>-</SP>-layer 12 on a part enclosed by a p-type separation layer 13. An n<SP>+</SP>-layer 15 is formed partially on the upper surface of the n-type embedded layer 11 while enclosing the p-type well layer 14 in the n<SP>-</SP>-layer 12 on the part enclosed by the p-type separation layer 13. Another n<SP>+</SP>-layer 17 is formed partially in the upper surface of the p-type well layer 14. A p<SP>+</SP>-layer 18 is formed partially in the upper surface of the p-type well layer 14 while enclosing the n<SP>+</SP>-layer 17. A polysilicon film 19 is formed on the upper surface of the p<SP>+</SP>-layer 18. A wiring 24 is connected to a signal input terminal 2 and a wiring 25 is connected to a ground terminal 3. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005347463(A) 申请公布日期 2005.12.15
申请号 JP20040164381 申请日期 2004.06.02
申请人 RENESAS TECHNOLOGY CORP 发明人 YOSHIHISA YASUKI
分类号 H01L27/04;H01L21/822;H01L21/8249;H01L27/06;(IPC1-7):H01L21/822;H01L21/824 主分类号 H01L27/04
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