| 摘要 |
PROBLEM TO BE SOLVED: To provide an SDRAM in which bit constitution can be switched and area penalty is reduced. SOLUTION: This apparatus is provided with a selector 116a in which a two bits serial data signal from one side of a data input/output terminal 112 is supplied to two pairs of input/output lines 121a, 122a as a parallel data signal in a×8 constitution mode, and two bit parallel data from both data input/output terminals 112, 113 are supplied to two pairs of input/ouput lines 121a, 122a as it is in×16 constitution mode. The apparatus becomes a two bit pre-fetch system in the×8 constitution mode, and becomes a single pipeline system in the×16 constitution mode. COPYRIGHT: (C)2006,JPO&NCIPI
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