System capable of dynamically arranging coprocessor number

摘要

A system capable of dynamically arranging coprocessor number, which uses a coprocessor instruction to be an instruction between a master processor and one or more coprocessors. The system includes plural coprocessors and a master processor. The plural coprocessors help the master processor to perform additional operations. The master processor executes plural instructions for data operations and applies the coprocessor instruction for data access and communication between the master processor and the coprocessors. The coprocessor instructions have at least one rearranged coprocessor instruction field and one main instruction opcode field each. The rearranged coprocessor instruction field has fields of coprocessor number, coprocessor opcode number and coprocessor register, or fields of coprocessor number and coprocessor register.