发明名称 MULTILAYER WIRING SUBSTRATE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring substrate that packages a high-performance semiconductor chips. SOLUTION: In a multilayer wiring substrate having a first multilayer wiring structure 10 including first wirings 13 and 16 and first via wirings 12 and 15 formed on a first side where a semiconductor chip is packaged, and a second multilayer wiring structure 30 including second wirings 32 and 35 and second via wirings 34PG and 34S, the second wirings are formed to be thicker than the first wirings. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005347696(A) 申请公布日期 2005.12.15
申请号 JP20040168632 申请日期 2004.06.07
申请人 SHINKO ELECTRIC IND CO LTD 发明人 HIRABAYASHI YOSHIKAZU;TANABE KATSUTOSHI
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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