| 摘要 |
PROBLEM TO BE SOLVED: To provide an operating method, including programming/eliminating method of a p-channel electric charge trap memory device which has high operation efficiency, and superior speed and information retaining characteristics. SOLUTION: In a memory device wherein a control gate copes with to a word line, a source region copes with a first bit line, a drain region corresponds to a second bit line, and a plurality of memory cells on a n-type substrate respectively include a first/second bit part where each piece of information is one bit, the reset of the selected memory cell comprises: supplying a first negative bias to the word line of the selected memory cell; supplying a ground bias to the first bit line and a second bit line, wherein the program of a first bit portion of the selected memory cell comprises supplying a first positive bias to the word line of the selected memory cell; supplying a second negative bias to the first bit portion of the selected memory cell; and supplying the ground bias to a second bit portion of the selected memory cell. COPYRIGHT: (C)2006,JPO&NCIPI
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