发明名称 |
Plateline voltage pulsing to reduce storage node disturbance in ferroelectric memory |
摘要 |
Methods ( 50, 70 ) and ferroelectric devices ( 102 ) are presented, in which pulses ( 113 ) are selectively applied to platelines (PL) of one or more non-selected ferroelectric memory cells ( 106 ) during memory access operations to mitigate cell storage node disturbances.
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申请公布号 |
US2005276089(A1) |
申请公布日期 |
2005.12.15 |
申请号 |
US20040866834 |
申请日期 |
2004.06.14 |
申请人 |
MADAN SUDHIR K;FONG JOHN |
发明人 |
MADAN SUDHIR K.;FONG JOHN |
分类号 |
G11C11/22;G11C17/00;(IPC1-7):G11C17/00 |
主分类号 |
G11C11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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