| 摘要 |
<P>PROBLEM TO BE SOLVED: To eliminate the need for forming a conductive film, having a lower conductivity than a metal silicide layer in place of the metal silicide layer, and to take measures against soft errors, by adding a high resistance to a node portion without making major changes in the manufacturing process. <P>SOLUTION: The semiconductor device is constituted such that a polycrystalline silicon film 3 and the metal silicide layer 8, which are electrically connected between an input terminal node N4 and an output terminal node N2 of an inverter circuit I2, are formed in the shape of a plate. In the part of an upper part of the polycrystalline silicon film 3 and the metal silicide layer 8, a trench 4 is formed to form a resistive element 4, resulting in the increase of the resistance of a gate electrode interconnection GC. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
