发明名称 Chip scale pin array
摘要 An integrated circuit package with lead fingers with a footprint on the order of the integrated circuit footprint is provided. A lead frame may be made from a metal sheet, which may be stamped or etched. The lead frame provides a plurality of posts and a connecting sheet connecting the plurality of posts. Dice are adhesively mounted to the plurality of posts. The dice have a conductive side with a plurality of conducting pads where each conducting pad is electrically and mechanically connected to a post. An encapsulating material is placed over the dice and lead frame, with the connecting sheet keeping the encapsulating material on one side of the lead frame. Parts of the connecting sheet are then removed, electrically isolating the posts. The integrated circuit packages formed by the encapsulated dice and leads may be tested as a panel, before the integrated circuit packages are singulated.
申请公布号 US6975038(B1) 申请公布日期 2005.12.13
申请号 US20030625917 申请日期 2003.07.23
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 MOSTAFAZADEH SHAHRAM
分类号 H01L21/48;H01L21/56;H01L23/31;H01L25/065;(IPC1-7):H01L23/48;H01L23/52 主分类号 H01L21/48
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