发明名称 Fabrication method of semiconductor integrated circuit device and testing method
摘要 A method of fabricating a semiconductor integrated circuit device includes performing a wafer process to a plurality of wafers so as to form a plurality of semiconductor integrated circuit devices over each of the wafers, performing a first electrical test to a first set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a first wafer cassette placed in a wafer prober, and performing a second electrical test to a second set of wafers selected from the plurality of wafers formed in the wafer process and accommodated in a second wafer cassette placed in the wafer prober by automatically changing a test object to the second set of wafers.
申请公布号 US6974710(B2) 申请公布日期 2005.12.13
申请号 US20030670352 申请日期 2003.09.26
申请人 HITACHI HOKKAI SEMICONDUCTOR, LTD. 发明人 TAIRA TOMOHIRO
分类号 G01R31/26;G01R31/28;H01L21/66;(IPC1-7):G01R31/26 主分类号 G01R31/26
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