发明名称 Optical clock extraction circuit
摘要 An optical clock extraction circuit that can be fabricated at low cost and suppress jitter is achieved. The optical clock extraction circuit extracts an optical clock signal phase-locked to a high-speed optical data signal. The circuit has a saturable absorber mirror, a pulsed light source for producing an optical pulsed signal consisting of repetitive optical pulses, a first optical coupler/splitter for passing the data signal and causing reflected light of the pulsed signal from the mirror to branch off, a second optical coupler/splitter for passing the pulsed signal, causing it to branch off to take out it as the clock signal, and causing reflected light of the data signal from the mirror to branch off, first and second lenses for collecting the data signal and pulsed signal passed through the coupler/splitters at the same position on the mirror and for returning reflected light rays of the two signals from the mirror to the coupler/splitters, respectively, a balanced photodetector, and an oscillator. The reflected light rays of the signals coming from the mirror and branched off by the coupler/splitters are made to hit the photodetector, which produces an electrical output signal corresponding to the difference in optical power between the incident signals. The oscillator produces a signal to the light source to control the phase of the pulsed signal according to the output from the photodetector.
申请公布号 US2005271390(A1) 申请公布日期 2005.12.08
申请号 US20050079135 申请日期 2005.03.15
申请人 YOKOGAWA ELECTRIC CORPORATION 发明人 NOGIWA SEIJI
分类号 H04B10/02;H04B10/00;H04B10/17;H04B10/18;H04L7/00;(IPC1-7):H04B10/00 主分类号 H04B10/02
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