发明名称 BIT MODELING COMPUTING ELEMENT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a bit modeling computing element used in the case of configuring an image coder adopting the JPEG 2000 coding system or the like that can attain high speed bit modeling processing with a simple configuration. <P>SOLUTION: A path computing element 26 sequentially carries out determining processing of a path for each bit in a bit plane by using 4 bits of a stripe for a path determining processing unit. Then a context computing element 28 uses 4 bits of the stripe for context determining processing unit and carries out the context determining processing of each bit of the bit plane by using a symbol, path information and significant information obtained by the path computing element 26 to carry out the context determining processing of 4 bits of the stripe. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005341368(A) 申请公布日期 2005.12.08
申请号 JP20040159277 申请日期 2004.05.28
申请人 FUJITSU LTD 发明人 HAGITANI TARO
分类号 G06T9/00;H04N1/41;H04N7/24;H04N19/00;H04N19/13;H04N19/34;H04N19/426;H04N19/63;H04N19/91;(IPC1-7):H04N1/41 主分类号 G06T9/00
代理机构 代理人
主权项
地址