| 摘要 |
PROBLEM TO BE SOLVED: To generate a dot clock which synchronizes to an external image signal, capable of securing a pulse width allowed by a device to which the dot clock is supplied. SOLUTION: According to the invention, a first dot clock is generated by dividing frequency of a high frequency clock and when a significant edge of a horizontal synchronous signal is detected, a phase of the signal is initialized according to information of a predetermined frequency dividing ratio. A second dot clock whose logic level is changed in each allowed minimum interval from a high frequency clock is formed according to information of the predetermined allowable minimum interval and when the significant edge is detected, the phase is corrected so that the allowable minimum interval of a logic level interval may be secured, before and after the detection. When the significant edge is detected, the second clock is selected, and thereafter, when timing of the first dot clock is confirmed to be the same as or later than that of the second dot clock, the first dot clock is selected. COPYRIGHT: (C)2006,JPO&NCIPI
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