发明名称 APPARATUS AND METHOD FOR FORMING CIRCUIT CONNECTION WIRING, CIRCUIT CONNECTION WIRING PROGRAM, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method in which a wiring defect can be suppressed even if a void is generated in wiring by arranging the wiring while considering the size of the void generated in the circuit connection wiring and the width of the wiring. SOLUTION: There are provided first wiring 1a for circuit connection formed on a semiconductor substrate and second wiring 1b connected with the first wiring 1a and formed smaller than the width of the first wiring 1a. When the size of width of the first wiring 1a is defined as W1, the size of width of the second wiring 1b is defined as W2, the size of a void generated in the first wiring 1a with respect to the width of the first wiring 1a is defined as V1 and the size of a void generated in the second wiring 1b with respect to the width of the second wiring is defined as V2, the first wiring 1a and the second wiring 1b are formed to satisfy a relation of W2/W1≥V2/V1. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005340456(A) 申请公布日期 2005.12.08
申请号 JP20040156320 申请日期 2004.05.26
申请人 SEIKO EPSON CORP 发明人 YAMANAKA HIDEICHIRO
分类号 G06F17/50;H01L21/3205;H01L21/82;H01L23/52;(IPC1-7):H01L21/320 主分类号 G06F17/50
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