发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, METHOD OF PREPARING PATTERN THEREFOR, MANUFACTURING METHOD AND APPARATUS THEREOF, MANUFACTURING METHOD THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To effectively absorb power supply noise, to hereby realize stable operation of a circuit, and particularly to absorb noise existent in the close vicinity of a noise generation source. SOLUTION: In a semiconductor integrated circuit device, a bypass capacitor is not disposed in a vacant space after a layout design, but a trench T is formed in a required circuit block or in a nearby surface to form a trench type capacitor cell C<SB>D</SB>. Consequently, it is possible to effectively demonstrate the reduction of a chip area and noise reduction effect by the optimum disposition of the bypass capacitor. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2005340347(A) |
申请公布日期 |
2005.12.08 |
申请号 |
JP20040154606 |
申请日期 |
2004.05.25 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MUKAI KIYOSHI;TSUJIKAWA HIROYUKI |
分类号 |
G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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