| 摘要 |
The invention provides a test apparatus for testing an electronic circuit device ( 101 ) to be tested by means of a test system ( 100 ), having an interface unit ( 102 ) for connecting the circuit device ( 101 ) to be tested to the test system ( 100 ), an address decoding unit ( 107 ) for decoding external addressing data ( 104 ) input by means of the test system ( 100 ) into internal addressing data ( 110, 112 ) and for addressing memory cells of a memory cell array ( 108 ) of the circuit device ( 101 ) to be tested with the internal addressing data ( 110, 112 ), and a memory data converter ( 115 ) for converting logical memory data ( 106 ), which are fed by the test system ( 100 ), into physical memory data ( 114 ). The memory data converter ( 115 ) carries out a conversion of the logical memory data ( 106 ) fed by the test system ( 100 ) into physical memory data ( 114 ) in a manner dependent on the internal addressing data ( 110, 112 ) of the circuit device ( 101 ) to be tested.
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