发明名称 CIRCUIT FOR REDUCING INTERFERING SIGNALS IN THE SYMMETRIC SUBSCRIBER ACCESS LINE CAUSED BY CROSSTALK
摘要 The invention relates to a circuit (S1) for reducing interfering signals caused by symmetry distortion during transmission over a to-core line. The inventive circuit (S1) comprises at least one adjustable switching element looped into an end area of the line in the two cores (A1,A2) of the two-core line. By adjusting the switching element in order to reduce the interfering signals, the reduction of the influence of interfering signals is optimized, something which can already be reduced through other measures such as twisting the cores (A1,A2). The invention can be used especially for enhancing maximum transmission paths or maximum bandwidth in broadband connections such as ADSL connections.
申请公布号 WO2005117284(A2) 申请公布日期 2005.12.08
申请号 WO2005EP52128 申请日期 2005.05.11
申请人 SIEMENS AKTIENGESELLSCHAFT;ADAKTYLOS, IOANNIS;DRUEGH, PAUL;KRUG, HANS-GUENTHER 发明人 ADAKTYLOS, IOANNIS;DRUEGH, PAUL;KRUG, HANS-GUENTHER
分类号 H04B3/00;H04B3/32;H04M1/74 主分类号 H04B3/00
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