发明名称 A power/ground configuration for low impedance integrated circuit
摘要 An integrated circuit including a die, a power terminal and a ground terminal all mounted onto a substrate. The power terminal including a body and a first extension projecting from the body, and the ground terminal including a body and a second extension projecting from the body. The second extension on the ground terminal being adjacent to the first extension on the power terminal to offset inductance that is generated by supplying current to the die through the power terminal.
申请公布号 GB2407208(B) 申请公布日期 2005.12.07
申请号 GB20050001086 申请日期 2003.07.25
申请人 * INTEL CORPORATION 发明人 DONG * ZHONG;FARZANEH * YAHYAEI-MOAYYED;DAVID G. * FIGUEROA;CHRIS * BALDWIN;JIANAGGI * HE;YUAN-LIANG * LI
分类号 H01L23/498;H01L23/50;(IPC1-7):H01L23/498 主分类号 H01L23/498
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