摘要 |
A device for ESD (electrostatic discharge) protection of a circuit (1) of a semiconductor device comprises a field effect transistor based varistor with gate, source and drain regions, wherein one of the source and drain regions is connected to an input/output pad (2) of the semiconductor device, and the other one of the source and drain regions is connected to an input/output terminal of the circuit (1). A biasing circuit (8) is connected to the gate region of the varistor to create an accumulation region below the gate of the varistor at normal operating voltages of said semiconductor device. The semiconductor device is preferably an integrated device on a single substrate (11). <IMAGE>
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