发明名称 |
Arrangement for capturing data |
摘要 |
An arrangement for capturing data from a data stream of a predetermined data transfer rate using a flip-flop, comprises a symmetrical multi-phase clock generator that is adapted to be locked to a reference clock which in turn is adapted to generate a reference clock signal at the data transfer rate or at a fraction thereof. The multi-phase clock generator is adapted to generate "n" clock signals mutually shifted in phase 360°/n from each other. A selector is connected to the clock generator to receive the n clock signals and selects one of these n clock signals as the system clock signal in response to a control signal from a clock phase counter. The clock phase counter is controlled to count up or down in response to the phase of the system clock signal when a predetermined number of data transitions have occurred in the data stream. The flip-flop is controlled by the opposite phase of the system clock signal to capture the data from the data stream.
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申请公布号 |
US6973149(B2) |
申请公布日期 |
2005.12.06 |
申请号 |
US20010986460 |
申请日期 |
2001.11.08 |
申请人 |
TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) |
发明人 |
FYVIE CLIFFORD D. |
分类号 |
H03L7/07;H03L7/081;H03L7/099;H03L7/18;H04L7/033;(IPC1-7):H04L7/06 |
主分类号 |
H03L7/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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