发明名称 Semiconductor integrated circuit device with a plurality of internal circuits operable in synchronism with internal clock
摘要 A second clock is generated as an intermittent train of pulses by removing some pulses from a first clock having a predetermined period, and is supplied as an internal clock to internal circuits of a semiconductor integrated circuit device. At the same time, a current generating circuit for consuming a power supply current is operated in timed relation to a third clock which comprises a train of pulses to be removed from the first clock.
申请公布号 US6972609(B2) 申请公布日期 2005.12.06
申请号 US20040803983 申请日期 2004.03.19
申请人 NEC ELECTRONICS CORPORATION 发明人 SHIMAMOTO MITSUHIRO
分类号 G06F1/08;G06F1/00;G06F1/04;G06F21/00;G11C8/00;H01L21/822;H01L27/04;(IPC1-7):G06F1/04 主分类号 G06F1/08
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