| 摘要 |
A microcomputer has a ROM with pre-stored programs, a RAM storing a revision program for executing an interruption-processing, and a program counter in which an address is successively renewed during an execution of the ROM-stored programs. A first register stores a comparison address corresponding to an optional address of the ROM-stored programs, at which an interruption-processing should be executed to virtually revise the ROM-stored programs. A second register stores a vector address data corresponding to a head address of the revision program. An address comparator compares the comparison address data with a renewed address of the program counter. A controller/calculator makes an access to the head address of the revision program, corresponding to the vector address data of the second register, when there is a coincidence between the comparison address data and the renewed address of the program counter, resulting in an execution of the interruption-processing in accordance with the revision program.
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