发明名称 Method and apparatus for optimizing timing for a multi-drop bus
摘要 A first device delivers a clock offset message to a second device. The second device offsets its data transmission according to the clock offset message. A test pattern is transmitted from the second device to the first device. The first device then checks the received test pattern to determine whether the transmission was successful. The first device can then deliver an additional clock offset message to the second device to instruct the second device to offset its data transmission by a different value than was used previously. The second device again transmits the test pattern and the first device again checks the received pattern. By trying a number of clock offset values and determining which values result in successful transmissions of data, the first device can determine the optimal clock offset value and instruct the second device to use this value for all transmissions.
申请公布号 US6973603(B2) 申请公布日期 2005.12.06
申请号 US20020187349 申请日期 2002.06.28
申请人 INTEL CORPORATION 发明人 SALMON JOSEPH H.;TO HING Y.
分类号 G06F11/00;G06F13/42;G11C8/00;G11C29/50;H04J3/06;H04L1/24;(IPC1-7):H04L1/24 主分类号 G06F11/00
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