发明名称 METHOD AND SYSTEM CARRYING OUT VARIABLE WIDTH LINK
摘要 PROBLEM TO BE SOLVED: To solve some problems faced when variable width link (for example, reduced width link) is mounted in method of transmitting data through link. SOLUTION: An embodiment of this invention provides an algorithm which divides a link into one or more reduced width links. In the embodiment, multiplexing scheme is used to carry out bit transmitting order required by specific cyclic redundancies check. Multiplexed output bits are swizzled on-chip in order to decrease on-board routine congestion. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005332359(A) 申请公布日期 2005.12.02
申请号 JP20040321189 申请日期 2004.11.04
申请人 INTEL CORP 发明人 STEINMAN MAURICE B;SHAH RAHUL R;CHERUKURI NAVEEN;SPINK AARON T;BAUM ALLEN J;DABRAL SANJAY;FRODSHAM TIM;DUNNING DAVID S;SCHOENBORN THEODORE Z
分类号 G06F13/38;G06F13/40;H04L12/26;H04L12/28;H04L29/08;(IPC1-7):G06F13/38 主分类号 G06F13/38
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