ESD protective circuit for low voltages with two interconnected field effect transistors

摘要

The protective circuit has a first field effect transistor (42) which has a first drain, a first source and a first control terminal. The circuit also has an input network (40). This changes the voltage between the first control terminal and the first source by means of a voltage applied between the first drain and the first source. The input network has a second field effect transistor complementary to the first. The drain of the first FET is connected to the source of the second and is also connected via a resistor to the base of the second FET. The drain of the second FET is connected to the base of the first and, via a resistor, to the source of the first.