| 发明名称 |
Simultaneous read circuit for multiple memory cells |
| 摘要 |
A memory device including a simultaneous read circuit design for multiple memory cells on a single interconnect using a fast fourier transform analysis circuit. The simultaneous read circuit can be used with any memory type storing information as an energy-absorbing state.
|
| 申请公布号 |
US2005265082(A1) |
申请公布日期 |
2005.12.01 |
| 申请号 |
US20040766010 |
申请日期 |
2004.01.29 |
| 申请人 |
CAMPBELL KRISTY A;GILTON TERRY L |
发明人 |
CAMPBELL KRISTY A.;GILTON TERRY L. |
| 分类号 |
G11C5/00;G11C7/06;G11C11/16;G11C11/56;G11C13/00;G11C13/02;G11C16/02;(IPC1-7):G11C5/00 |
主分类号 |
G11C5/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
