发明名称 Prioritized bus request scheduling mechanism for processing devices
摘要 A scheduler stores data to be scheduled. The scheduler may include an array that identifies relative priorities among the queue entries according to a first priority scheme, such as by age. The scheduler also may include a priority register array identifying relative priorities among the queue entries according to a second priority scheme, such as by data type. A plurality of detectors coupled to the array and to the priority register array may determine which data is to be scheduled next.
申请公布号 US2005268051(A1) 申请公布日期 2005.12.01
申请号 US20040095623 申请日期 2004.05.11
申请人 发明人 HILL DAVID L.;BACHAND DEREK T.
分类号 G06F12/00;G06F12/08;G06F13/16;G06F13/18;(IPC1-7):G06F12/00 主分类号 G06F12/00
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