| 摘要 |
A multiple-die semiconductor chip package ( 68 ) has first and second die ( 42, 44 ) which define a first, adhesive region ( 58 ) therebetween. Wires ( 20 ) extend from bond pads ( 14 ) on a first die surface ( 52 ). The second die has an insulated second die surface ( 54 ) positioned opposite the first die surface. An adhesive/spacer structure ( 46 ), comprising spacer elements ( 50 ) within an adhesive ( 48 ), adheres the first and second die to one another. The package may comprise a set of generally parallel wires which defines a wire span portion ( 60 ) of the first region. The adhesive/spacer structure is preferably located at other than the wire span portion of the first region. A method for adhering the first and second die to one another is also disclosed. |
