发明名称 Method for expanding the addressing capability of a plurality of registers and apparatus for implementation thereof
摘要 A microprocessor includes a plurality of blocks of registers, each block of registers having at least two registers. The microprocessor further includes a location register for selectively characterizing at least one of the blocks as a specified block of registers, and a control register for selecting at least one operation for the indicated block of registers. In one example of the invention, the control and location registers are two of the registers specified by the IEEE 802.3 standard.
申请公布号 US2005259777(A1) 申请公布日期 2005.11.24
申请号 US20040849749 申请日期 2004.05.19
申请人 CLASEMAN GEORGE 发明人 CLASEMAN GEORGE
分类号 G06F9/30;G06F9/318;G06F12/06;G11C19/00;(IPC1-7):G11C19/00 主分类号 G06F9/30
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