MRAM ARCHITECTURE WITH ELECTRICALLY ISOLATED READ WRITE CIRCUITRY

摘要

A magnetoresistive random access memory (MRAM) (200) has separate read (RWLO, RGBLO) and write (WBLO, WWLO) paths. This reduces the peripheral circuitry (114, 116, 118, 120, 122, 124, 126, 128, 130, 132) by not requiring switching between read and write functions on a particular line. By having the paths dedicated to either read signals or write signals, the voltage levels can be optimized for these functions. The select transistors (230), which are part of only the read function, may be of the low-voltage type because they do not have to receive the relatively higher voltages of the write circuitry. Similarly, the write voltages do not have to be degraded to accommodate the lower-voltage type transistors. The size of the overall memory (200) is kept efficiently small while improving performance. The memory cells (202) are grouped so that adjacent to groups are coupled to a common global bit line (RGBLO) which reduces the space required for providing the capacitance-reducing group approach to memory cell selection.