发明名称 Method for VLSI system debug and timing analysis
摘要 A method for characterizing circuit activity in an IC. Generally, the method comprises the steps of activating an IC, resolving the switching activity in space and time, and generating a representation of the switching behavior which differentiates the time that circuits or transistors switch. One embodiment of the invention, utilizes a method such as, but not limited to, time resolved photon emission to observe transistor level switching activity in an integrated circuit (IC).
申请公布号 US2005262454(A1) 申请公布日期 2005.11.24
申请号 US20030663020 申请日期 2003.09.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHASE HAROLD W.;KNEBEL DANIEL R.;MENZER DENNIS G.;POLONSKY STANISLAY;SANDA PIA N.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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