Dual work function metal gate integration in semiconductor devices

摘要

The present invention provides, in one embodiment, a process for forming a dual work function metal gate semiconductor device ( 100 ). The process includes providing a semiconductor substrate ( 105 ) having a gate dielectric layer ( 110 ) thereon and a metal layer ( 205 ) on the gate dielectric layer. A work function of the metal layer is matched to a conduction band or a valence band of the semiconductor substrate. The process also includes forming a conductive barrier layer ( 210 ) on a portion ( 215 ) of the metal layer and a material layer ( 305 ) on the metal layer. The metal layer and the material layer are annealed to form a metal alloy layer ( 405 ) to thereby match a work function of the metal alloy layer to another of the conduction band or the valence band of the substrate. Other embodiments of the invention include a dual work function metal gate semiconductor device ( 900 ) and an integrated circuit ( 1000 ).