发明名称 No-precharge FAMOS cell and latch circuit in a memory device
摘要 The fuse and latch circuit has a Floating gate Avalanche injection Metal Oxide Semiconductor (FAMOS) transistor (fuse) that is coupled to a read circuit. The read circuit includes circuitry that reduces the drive strength of the fuse. A transmission gate couples the read circuit to the latch circuit. The transmission gate isolates the fuse from the latch. When a reset condition occurs, the data that was in latch circuit remains after the reset condition is complete.
申请公布号 US6967889(B2) 申请公布日期 2005.11.22
申请号 US20030727087 申请日期 2003.12.02
申请人 MICRON TECHNOLOGY, INC. 发明人 IMONDI GIULIANO GENNARO
分类号 G11C16/26;G11C17/16;(IPC1-7):G11C7/00 主分类号 G11C16/26
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