| 摘要 |
An apparatus includes a first circuit detecting when an absolute value of a current signal is less than a first predetermined value and outputting a signal after a first time period. A comparator compares that signal to an envelope of a rectified current signal, in order to provide an output with a plurality of pulses tha t persist for a relatively longer time for a relatively small value of the envelope, and persist for a relatively shorter time for a relatively large value of the envelope. A seco nd circuit enables the comparator output if the rectified current signal exceeds a seco nd predetermined value, and disables the comparator output after the rectified current signal is below the second predetermined value for a second time period. A third circuit accumulates the pulses and outputs a signal representative of a wet track arc fault.
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