发明名称 MULTIPORT MEMORY ELEMENT HAVING SERIAL INPUT/OUTPUT INTERFACE
摘要 PROBLEM TO BE SOLVED: To provide a multiport memory element capable of testing operation without colliding with an internal command/address generation path through a restricted external pin. SOLUTION: The multiport memory element, having a number of ports for supporting a serial input/output interface comprises a memory core; a control means for generating the internal command signal, an internal address signal, and a control signal by using commands inputted to the number of ports in a packet form and addresses; and a mode selection means for generating a test mode flag signal by combining signals applied to a number of mode selection pads. The input/output data assigned to transmission and reception pads by responding to the test mode flag signal are exchanged with a memory core via the ports, and the command assigned to the transmission and reception pads, the address, and the control signal are bypassed by the port and the control means and are provided to the memory core. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005322375(A) 申请公布日期 2005.11.17
申请号 JP20040195067 申请日期 2004.06.30
申请人 HYNIX SEMICONDUCTOR INC 发明人 LEE IL-HO
分类号 G01R31/28;G11C5/02;G11C7/10;G11C8/16;G11C11/401;G11C11/4063;G11C29/00;G11C29/04;G11C29/26;(IPC1-7):G11C29/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址
您可能感兴趣的专利