发明名称 Integrated circuit for processing data blocks received from a plurality of data sources
摘要 An integrated circuit (IC) for processing data blocks received from a plurality of data sources. The IC includes at least one re-ordering function entity, higher protocol layers and an interface for receiving at least one copy of a successfully decoded data block from the data sources. The IC uses the re-ordering function entity to process the copy of the successfully decoded data block to support in-sequence delivery to the higher protocol layers. The IC discards extra copies of a successfully decoded data block received from the data sources. Each data source may be an enhanced uplink soft handover (EU-SHO) Node-B. Each data source may include a medium access control (MAC) entity that handles enhanced uplink dedicated channel (EU-DCH) functionalities. The IC may be located in a serving radio network controller (S-RNC) that processes data blocks forwarded to the S-RNC by the data sources during soft handover.
申请公布号 US2005255823(A1) 申请公布日期 2005.11.17
申请号 US20050183627 申请日期 2005.07.18
申请人 INTERDIGITAL TECHNOLOGY CORPORATION 发明人 ZHANG GUODONG;TERRY STEPHEN E.;DICK STEPHEN G.
分类号 H04B7/26;H04B;H04B1/28;H04B7/00;H04L1/00;H04L29/06;H04M7/00;H04W36/02;H04W36/08;H04W36/18;(IPC1-7):H04B1/28;H04Q7/20 主分类号 H04B7/26
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